The present invention is generally related to the field of semiconductors. More particularly, the present invention is related to method and system for Joule heating characterization in semiconductors.
In an effort to achieve increased speed, copper and low dielectric constant (xe2x80x9clow-kxe2x80x9d) dielectrics are replacing aluminum and conventional dielectrics, such as silicon oxide, in state-of-the-art microprocessors and other semiconductor devices. By utilizing low-k dielectrics, semiconductor manufacturers advantageously achieve reduced inter-layer and intra-layer capacitance compared to the capacitance that results from the utilization of conventional dielectrics. However, low-k dielectrics are generally poor thermal conductors and result in increased xe2x80x9cJoule heatingxe2x80x9d in copper metal layer and especially in upper metal layers.
By way of background, xe2x80x9cJoule heatingxe2x80x9d is thermal energy that results from a current flow encountering resistance in a metal structure, such as an interconnect line in a semiconductor device. As temperature increases, resistance in the metal structure will increase as a result of an increased number of lattice collisions in the metal structure. Thus, Joule heating will further increase as the current increases because increased heat causes the resistance in the metal structure to increase. As a result of increased heat caused by Joule heating, the performance of the semiconductor device can be adversely affected.
Also, in the effort to achieve high speed, semiconductor manufacturers typically push the design of semiconductor devices to the limit by increasing current density to the maximum allowable amount. As a result, if the increase in heat caused by Joule heating is not taken into account in the design of the semiconductor device, the reliability of the semiconductor device can be detrimentally affected. Thus, semiconductor manufacturers are challenged to characterize Joule heating in semiconductor devices utilizing copper and low-k dielectrics and to allow for Joule heating in the design of those devices.
In a conventional approach, Joule heating is determined by performing a very large number of point by point measurements for a particular metal structure to obtain the amount of Joule heating corresponding to a certain quantity of current injected into the metal structure. Since a very large number of data points must be obtained by individual measurements, the process of determining the Joule heating corresponding to a very large number of injected currents for a particular structure is very time consuming. Furthermore, in a semiconductor device comprising a number of metal layers, the amount of Joule heating for each metal layer would have to be obtained individually utilizing the time consuming process described above for each metal layer.
Additionally, in the conventional approach, package level (also called oven level) measurements are utilized to obtain Joule heating data. To obtain package level measurements, a package containing a die must be cut for access and for Joule heating measurements. The package is then placed in an oven, current is injected into a test structure in the die within the package at a certain temperature, and a corresponding Joule heating, i.e. increase in temperature of the metal structure, is then determined at each data point corresponding to each current density. Package level measurements undesirably add additional time and expense to the process of obtaining Joule heating data, since the oven requires time to heat up and the dies containing the test structures must be cut and assembled into packages.
Thus, there is a need in the art for an efficient method and system for characterizing Joule heating in semiconductors.
The present invention addresses and resolves the need in the art for an efficient method and system for characterizing Joule heating in semiconductors.
According to one exemplary embodiment, as a part of the present invention, a method for establishing a relationship between Joule heating in a conductor and a current density in the conductor is implemented by performing wafer level measurements. According to this exemplary embodiment, wafer level measurements are performed to arrive at a temperature coefficient of resistance in the conductor. The method also includes determining a thermal resistance of the conductor. The thermal resistance is then utilized to establish a relationship between Joule heating in the conductor and the current density in the conductor. The relationship so obtained is then utilized to determine design rules, mean time to fail, and other information to aid in the design of reliable semiconductor devices.
According to another exemplary embodiment, a wafer level measurement system is utilized to establish a relationship between Joule heating in a conductor and a current density in the conductor. The wafer level measurement system includes, among other things, a measuring device and a heating device. The heating device is utilized to heat a wafer having the conductor thereon while the measuring device is utilized to determine a change in a resistance of the conductor to arrive at the temperature coefficient of resistance of the conductor. The system then determines the thermal resistance of the conductor based on the temperature coefficient of resistance where the thermal resistance is utilized to establish the relationship between Joule heating and the current density in the conductor, and where the relationship so established is utilized to determine, among other things, mean time to fail and various design rules. Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.